File simdlib_avx512.h
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namespace faiss
Implementation of k-means clustering with many variants.
Copyright (c) Facebook, Inc. and its affiliates.
This source code is licensed under the MIT license found in the LICENSE file in the root directory of this source tree.
IDSelector is intended to define a subset of vectors to handle (for removal or as subset to search)
PQ4 SIMD packing and accumulation functions
The basic kernel accumulates nq query vectors with bbs = nb * 2 * 16 vectors and produces an output matrix for that. It is interesting for nq * nb <= 4, otherwise register spilling becomes too large.
The implementation of these functions is spread over 3 cpp files to reduce parallel compile times. Templates are instantiated explicitly.
This file contains callbacks for kernels that compute distances.
Throughout the library, vectors are provided as float * pointers. Most algorithms can be optimized when several vectors are processed (added/searched) together in a batch. In this case, they are passed in as a matrix. When n vectors of size d are provided as float * x, component j of vector i is
x[ i * d + j ]
where 0 <= i < n and 0 <= j < d. In other words, matrices are always compact. When specifying the size of the matrix, we call it an n*d matrix, which implies a row-major storage.
I/O functions can read/write to a filename, a file handle or to an object that abstracts the medium.
The read functions return objects that should be deallocated with delete. All references within these objectes are owned by the object.
Definition of inverted lists + a few common classes that implement the interface.
Since IVF (inverted file) indexes are of so much use for large-scale use cases, we group a few functions related to them in this small library. Most functions work both on IndexIVFs and IndexIVFs embedded within an IndexPreTransform.
In this file are the implementations of extra metrics beyond L2 and inner product
Implements a few neural net layers, mainly to support QINCo
Defines a few objects that apply transformations to a set of vectors Often these are pre-processing steps.
Functions
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inline simd16uint16 combine4x2(simd32uint16 a, simd32uint16 b)
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struct simd512bit
- #include <simdlib_avx512.h>
512-bit representation without interpretation as a vector
Simple wrapper around the AVX 512-bit registers
The objective is to separate the different interpretations of the same registers (as a vector of uint8, uint16 or uint32), to provide printing functions, and to give more readable names to the AVX intrinsics. It does not pretend to be exhausitve, functions are added as needed.
Subclassed by faiss::simd32uint16, faiss::simd64uint8
Public Functions
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inline simd512bit()
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inline explicit simd512bit(__m512i i)
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inline explicit simd512bit(__m512 f)
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inline explicit simd512bit(const void *x)
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inline explicit simd512bit(simd256bit lo)
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inline explicit simd512bit(simd256bit lo, simd256bit hi)
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inline void clear()
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inline void storeu(void *ptr) const
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inline void loadu(const void *ptr)
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inline void store(void *ptr) const
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inline void bin(char bits[513]) const
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inline simd512bit()
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struct simd32uint16 : public faiss::simd512bit
- #include <simdlib_avx512.h>
vector of 32 elements in uint16
Public Functions
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inline simd32uint16()
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inline explicit simd32uint16(__m512i i)
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inline explicit simd32uint16(int x)
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inline explicit simd32uint16(uint16_t x)
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inline explicit simd32uint16(simd512bit x)
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inline explicit simd32uint16(const uint16_t *x)
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inline explicit simd32uint16(simd256bit lo)
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inline explicit simd32uint16(simd256bit lo, simd256bit hi)
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inline void set1(uint16_t x)
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inline simd32uint16 operator*(const simd32uint16 &other) const
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inline simd32uint16 operator>>(const int shift) const
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inline simd32uint16 operator<<(const int shift) const
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inline simd32uint16 operator+=(simd32uint16 other)
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inline simd32uint16 operator-=(simd32uint16 other)
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inline simd32uint16 operator+(simd32uint16 other) const
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inline simd32uint16 operator-(simd32uint16 other) const
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inline simd32uint16 operator&(simd512bit other) const
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inline simd32uint16 operator|(simd512bit other) const
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inline simd32uint16 operator^(simd512bit other) const
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inline simd32uint16 operator~() const
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inline simd16uint16 low() const
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inline simd16uint16 high() const
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inline uint16_t operator[](int i) const
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inline void accu_min(simd32uint16 incoming)
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inline void accu_max(simd32uint16 incoming)
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inline void clear()
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inline void storeu(void *ptr) const
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inline void loadu(const void *ptr)
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inline void store(void *ptr) const
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inline void bin(char bits[513]) const
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inline simd32uint16()
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struct simd64uint8 : public faiss::simd512bit
Public Functions
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inline simd64uint8()
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inline explicit simd64uint8(__m512i i)
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inline explicit simd64uint8(int x)
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inline explicit simd64uint8(uint8_t x)
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inline explicit simd64uint8(simd256bit lo)
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inline explicit simd64uint8(simd256bit lo, simd256bit hi)
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inline explicit simd64uint8(simd512bit x)
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inline explicit simd64uint8(const uint8_t *x)
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inline void set1(uint8_t x)
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inline simd64uint8 operator&(simd512bit other) const
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inline simd64uint8 operator+(simd64uint8 other) const
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inline simd64uint8 lookup_4_lanes(simd64uint8 idx) const
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inline simd32uint16 lane0_as_uint16() const
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inline simd32uint16 lane1_as_uint16() const
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inline simd64uint8 operator+=(simd64uint8 other)
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inline uint8_t operator[](int i) const
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inline void clear()
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inline void storeu(void *ptr) const
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inline void loadu(const void *ptr)
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inline void store(void *ptr) const
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inline void bin(char bits[513]) const
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inline simd64uint8()
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inline simd16uint16 combine4x2(simd32uint16 a, simd32uint16 b)